Questions below are based on this example CPU. Let us name this CPU as UC$3026$SS$2024$ for convenience of reference

$1.$ The UC$3026$SS$2024$ has $7$ machine instructions in its Instruction Set $($LDA addr, STA addr, ADD, SUB, MBA, JMP addr, JN addr$).$ Its hardware includes PC$,$ IR$,$ ALU, two registers $$ AC and B$,$ MAR, MDR$,$ and a Control Unit. The datapath control in the CPU is achieved through $16$ different control signals connected to various hardware components. Given below are Boolean expression for two of these $16$ controls for designing a Hardwired Control unit:

W $($memory write$)=$ T$5*$ STA

R $($memory read$)=$ T$1+$ T$4*$ LDA

Where $+$ means logical OR and $*$ means logical AND

Write such Boolean expressions for LD$,$ ED$,$ EI and LI control signals. Also, design the Hardwired Unit for above four control signals using basic logic gates.

$2.$ Write Microinstructions for machine instruction in the Instruction Set i$.$e$.$ LDA addr, STA addr, and JN addr of UC$3026$SS$2024$ machine.

$3.$ Suppose, you as designer of the CPU decide to add two general$-$purpose registers named as D and E having two$-$way connection with the internal bus of the CPU. Draw the modified CPU diagram with these two registers.

$4.$ Further suppose that you decide to enrich the Instruction Set $($IS$)$ with following instructions:

Instruction Meaning Action Microsteps involved

MAD Copy contents of D to AC AC $$ D

MDA Copy contents of AC to D D $$ AC

MBE Copy contents of E to B B $$ E

LDE addr Load E register from the given address E $$ RAM$[$addr$]$

$($a$)$ Fill the Microsteps column of this table.

$($b$)$ What additional control signals will be required for registers D and E taking the enriched IS into account.

$($c$)$ Write the Boolean expressions for the additional control signals.

$($d$)$ Develop the microcode for the four extra machine instructions given in the table above.