Read specifications below carefully. Build: a) Create a PC component as 8 bit Register. b) Create Multiplexers with respect to given data path diagram. c) Create RAM with given specifications. d) Create Inputs for control signals (RegDst,Jump,ALUSrc,MemtoReg,RegWrite,MemRead,MemWrite,Branch) e) Use splitters to divide Instruction bit partitions. f) Connect the cables according to diagram. Test: Provide instruction and all control signals for each of these instructions of the following MIPS program. addi \$1, \$0, 9 \# reg1 = 0x00001001 addi $2,$0,6# reg 2=000000110 or $3,$1,$2# reg 3=000001111 You should see 000001111 stored in register 3 of register file if everything works. After: sw \$3, 3(\$1) \# RAM location 12 should have 0x00001111 Iw $4,3($1) \# Register 4 should gave 000001111 You are expected to implement your Datapath design and Upload .circ file for your labwork. (If you import different .circ files include them) Specifications for SMIPS Datapath Instruction Types: - Memory-reference: Iw, sw - Arithmetic-logical: AND, OR, Add, Sub, Slt, XOR, XNOR and NOR, addi - Control flow: beq, j Memory Specifications: - Instruction Memory: 2568 (8-bit word addressing / 8-bit words) - The least significant 8 bits of Instruction is used - Data Memory: 2568 (8-bit word addressing / 8-bit words) - 8 bits of ALU result is used Memory-reference instruction specifications: - For sw and Iw, an immediate value in the interval [27,271] is used as offset. - Memory address is the least significant 8 bits of Reg[Ins[14..12]] +Ins[7..0] Control flow specifications: - For beq, an immediate value in the interval [27,271] is used to compute the branch address. - Branch address is PC+1+lns[7..0] - For j, the least significant 8 bits of the instruction is used directly as the jump address. - Jump address is Ins[7..0] Immediate Instruction specifications: - addi instruction is included. - Reg[Ins[11..9]]=Reg[Ins[14..12]]+Ins[7..0] Read specifications below carefully. Build: a) Create a PC component as 8 bit Register. b) Create Multiplexers with respect to given data path diagram. c) Create RAM with given specifications. d) Create Inputs for control signals (RegDst,Jump,ALUSrc,MemtoReg,RegWrite,MemRead,MemWrite,Branch) e) Use splitters to divide Instruction bit partitions. f) Connect the cables according to diagram. Test: Provide instruction and all control signals for each of these instructions of the following MIPS program. addi \$1, \$0, 9 \# reg1 = 0x00001001 addi $2,$0,6# reg 2=000000110 or $3,$1,$2# reg 3=000001111 You should see 000001111 stored in register 3 of register file if everything works. After: sw \$3, 3(\$1) \# RAM location 12 should have 0x00001111 Iw $4,3($1) \# Register 4 should gave 000001111 You are expected to implement your Datapath design and Upload .circ file for your labwork. (If you import different .circ files include them) Specifications for SMIPS Datapath Instruction Types: - Memory-reference: Iw, sw - Arithmetic-logical: AND, OR, Add, Sub, Slt, XOR, XNOR and NOR, addi - Control flow: beq, j Memory Specifications: - Instruction Memory: 2568 (8-bit word addressing / 8-bit words) - The least significant 8 bits of Instruction is used - Data Memory: 2568 (8-bit word addressing / 8-bit words) - 8 bits of ALU result is used Memory-reference instruction specifications: - For sw and Iw, an immediate value in the interval [27,271] is used as offset. - Memory address is the least significant 8 bits of Reg[Ins[14..12]] +Ins[7..0] Control flow specifications: - For beq, an immediate value in the interval [27,271] is used to compute the branch address. - Branch address is PC+1+lns[7..0] - For j, the least significant 8 bits of the instruction is used directly as the jump address. - Jump address is Ins[7..0] Immediate Instruction specifications: - addi instruction is included. - Reg[Ins[11..9]]=Reg[Ins[14..12]]+Ins[7..0]