Redesign the same RAM$-$based $7-$segment decoder as in Apply $8$A$,$ this time using four separate

$4$x$8$ RAM blocks. The RAM blocks each contain characters $0$ to $3,4$ to $7,8$ to $11,$ and $12$ to $15.$

Since the "character data" is now stored over the $4$ RAM blocks, you have to add extra logic to:

write data to the selected RAM block $($i$.$e$.$ set its W input to $1).$ This is typically done by using

a $2-$to$-4$ decoder.

read data from the selected RAM block. This is typically done by multiplexing the four RAM

outputs onto the $7-$segment displays.

Take a snapshot of the whole circuit.