Regarding cache memory, select true statements$).$ Cache line is replaced upon cache hit. Control bits in cache memory is used for cache memory book keeping purpose. For any cache system, memory address to cache line mapping is always many$-$to$-$one mapping. Cache memory always needs quotient and remainder generation circuit $($a$.$k$.$a$.$ division circuit$)$ to translate block address into cas line index and tag. For $1-$way associative cache, memory addresses to cache lines mapping is many$-$to$-$one mapping.