Question: Repeat Problem 6 . 7 , but this time for a pipelined processor with two branch delay slots. The output from the optimizing compiler is

Repeat Problem 6.7, but this time for a pipelined processor with two branch delay slots.
The output from the optimizing compiler is such that the first delay slot is filled with a useful
instruction 70 percent of the time, but the second slot is filled with a useful instruction only
10 percent of the time.
Compare the compiler-optimized execution time for this case with the compiler-optimized
execution time for Problem 6.7. Assume that the two processors have the same clock
rate. Indicate which processor/compiler combination is faster, and determine the speedup
percentage by which it is faster.

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