Question: SECTION 2 - Sequential Logic Circuits: The following is an SN state diagram, 10 is the reset (Start) state. (X/Z represents Input X/Output Z). Use

SECTION 2 - Sequential Logic Circuits: The following is an SN

SECTION 2 - Sequential Logic Circuits: The following is an SN state diagram, "10" is the reset (Start) state. (X/Z represents Input X/Output Z). Use the following diagram to answer question #2 and question #3. ol 00 1/0 1/0 0/0 0/0 11 1/1 10 0/0 01 1/0 Question 2 10 pts What is/are the 3-bit binary pattern(s) that this SN detects (i.e., when output Z = 1). Edit View Insert Format Tools Table 12pt Paragraph B I U A 2 Tv

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