sheet! n every Name: 17. List the three (3) ee () primary steps of the instruction execution cycle, in sequential order step a. fetch, decode, memory write b. fetch, memory read, execute c. decode, fetch, execute d. fetch, decode, execute ch lag is set when an unsigned value is too large to fit into a destination operand? b. Carry c. Overflow d. Auxiliary Carry 19. Which of the following correctly describes the sequence of reading from memory during a single clock cycle? Read line set low; Address placed on bus; Operand placed on data bus by memory controller; Read line set high, indicating that data bus contains the requested data a. b. Address placed on bus; Operand placed on data bus by memory controller; Read line set low; Read line set high, indicating that data bus contains the requested data. Address placed on bus; Read line set low; Read line set high, indicating that data bus contains the requested data; Operand placed on data bus by memory controller c. Address placed on bus; Read line set low; Operand placed on data bus by memory controller; Read line set high, indicating that data bus contains the requested data d