Simple Calculator using verilog Consider a simple calculator that accepts inputs from $1$ to $5.$ The calculator can do the following operations: $1.$ Addition, $2.$ Multiplication, and $3.$ Subtraction. $-$ Initially the calculator is in its idle mode. The flow should be as follows: $1-$ Assign numbers $1$ to $5$ to the push buttons on the FPGA board as depicted in Fig. $2.$ Fig $2.$ Push buttons as a keypad $2-$ The user needs to enter the first operand $($fo$),$ and the number will be displayed on the first seven segments $($disp$\_1).3-$ The user needs to enter the second operand $($so$),$ and the number will be displayed on the second seven segments $($disp$\_2).4-$ Then, the user needs to select one of the $3$ operations: Addition or Multiplication or Subtraction. $5-$ The result should be displayed on the seven segments $($disp$\_3$ and disp$\_4).6-$ If the user selects subtraction and the result is a negative value, then an LED indicator $($N$)$ should be asserted, and the absolute value of the result should be displayed on the $7-$seg. Note that, $2$s$-$Complement must be used for subtraction. $1.$ Cntr$\_$Unit: To lower down the FPGA internal clock to $10$Hz$.2.$ FSM$\_$Lock$\_$Unit: The FSM that controls the calculator operation. $3.$ Disp$\_$Unit: It accepts the binary data for seven segment displays and decode and display them using time division multiplexing. $4.$ SW$\{0,1,2\}$: These switches from FPGA board are used to select the operator. $5.$ PB$\{1,2,3,4,5\}$: These push buttons from FPGA board are used to enter the operands. Fig $2.$ Push buttons as a keypad