Solve the following questions, and upload your pdf solution on to Moodle. Dont forget to add your name & ID, and to number your pages. For each question, show the design, test, and a screenshot of the results. verilog code Q4: Design a one-input, one-output serial 2s complementor. The circuit accepts a string of bits from the input and generates the 2s complement at the output. The circuit can be reset asynchronously to start and end the operation. Test your circuit using the following input sequence. 1) 010111110111100 2) Random sequence of your choice.