Question: Some architectures support the memory indirect addressing mode. Below is an example. In this case, the register R3 contains a pointer to a pointer. Two

Some architectures support the memory indirect addressing mode. Below is an example. In this case, the register R3 contains a pointer to a pointer. Two memory accesses are required to load the data. ADD R1, @(R3) The MIPS CPU doesnt support this addressing mode. Write a MIPS code thats equivalent to the instruction above. The pointer-to-pointer is in register $t3. The other data is in register $t1.

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