Source code showing all your codes. Please include the global

documentation and each function head documentation in your source code $($before

compilation$).$

Run your simulation program with the testing input values $(32$ cases as shown above$)$

and submit the run$-$time outputWrite a simulation code $($program$)$ for $1-$bit ALU, which performs AND, OR$,$ Add and Sub

operations.

$1-$bit ALU should have subcomponents: $2-$input AND$/$OR gates, $1-$bit full adder, $2$x$1$ mux and

$4x1$ mux. These subcomponents should be implemented with a function each.

Suggested steps to complete the code:

Write a simulation functions for AND gate and OR gate, e$.$g$.,$

int AND$\_$gate $($int a$,$ int b$).$

int OR$\_$gate $($int a$,$ int b$)\{dots\}$

Write a simulation function for the full$\_$adder. e$.$g$.,$

int full$\_$adder $($int a$,$ int b$,$ int cin, int &cout$).$

Write a simulation function for the $2x1x,$ e$.$g$.,$

int mux$\_2$x$1($int $x1,$ int $x2,$ int sel$)\{dots\}$

Write a simulation function for the $4x1$ mux, e$.$g$.,$

int mux$\_4$x$1($int $x1,$ int $x2,$ int $x3,$ int $x4,$ string sel$)\{dots\}$

Write a simulation function for the $1$bit$\_$ALU, e$.$g$.,$

int ALU$\_1$bit $($int a$,$ int b$,$ int B$\_$inv, int cin, string op$,$ int &cout$)\{dots\}$

Write a driver module $($main function$)$ and test your $1-$bit ALU for correctness with all

possible input value combinations $($total $32$ cases to test$).$

The driver should display input values and the corresponding output values for each

test case, i$.$e$.,$