Step$3$: Table $3$ shows the Verilog program students are required to use for test. Fill$-$in the machine codes for this program and also load the instruction memory with this program.

Table $3$: The content of the instruction memory

$\backslash$table$[[$Address$,,$Instruction,$],[00,$LW$,$x$11,16($x$0),],[01,$LW$,$x$12,4($x$0),],[02,$LW$,$x$13,80($x$0),],[03,$xOR,x$0,$ x$1,$ x$11,],[04,$ADD,x$2,$ x$0,$ x$11,],[05,$ADD,x$10,$ x$13,$ x$12,],[06,$BLT$,$x$11,$ x$12,-8,],[07,$ADDI,x$19,$ x$12,5,],[08,$ADDI,x$18,$ x$13,100,],[09,$BLT$,$x$12,$ x$10,4,],[10,$SUB,x$10,$ x$12,$ x$11,],[11,$BEQ,x$12,$ x$19,12,],[12,$SLT$,$x$11,$ x$19,$ x$18,],[13,$ADDI,x$7,$ x$0,25,],[14,$xOR,x$0,$ x$1,$ x$2,],[15,$BEQ,x$11,$ x$12,6,],[16,$xOR,x$1,$ x$1,$ x$2,],[17,$LW$,$x$12,48($x$0),],[18,$ORI,x$10,$ x$0,16,]]$