Subject - Computer Organization and Architecture [ Theory ]

///////// It's my 3rd-time post for this questions answer. if you don't have enough knowledge for solving this answer, please skip it.

Hi Experts! Would you please try to solve this as soon as possible with 100 % Accuracy? If possible, please do it.

You have to follow some instructions which I mentioned below. If you don't follow my instructions, please skip my questions.

You have to answer only #1 . I repeated, don't do other numbers.

Instructions are given,

• You need to show detailed calculations, as required.
• You need to provide clear diagrams, as required. All diagrams should be clearly drawn

1. 10 Use the Booth algorithm to multiply -17 by +19. Draw the schematic of hardware and show the contents of each section after each iteration using a Table, given below: (2+6+2) Iteration OPERATION Content of register A Content of register Content of Q-1 Content of Q.Q.1 Content of register M Initialization Initial Value Iteration-1 Iteration-2 If a CPU runs at 3.3GHz and each iteration requires 2 clock cycles, calculate the execution time for this multiplication