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Lab 5: Sequential Circuits (Sequence Detector Circuit) Note: Please come prepared for the lab. Obiective: Design, analyze, implement, and test a Sequence Detector Circuit using Logisim. Preparation: Carefully read this document to prepare for the lab session. Prelab Exercise: Complete the design of the Sequence Detector Circuit in advance. Reviewing Lecture-6 may be useful in the design process. Sequence Detector A sequence detector is a sequential state machine that takes an input string of bits and generates an output 1 whenever the target sequence has been detected. Exercise 1- Design a sequential circuit that detects the sequence 1101 in a string of bits coming through an input line. This sequence detector circuit has one input x and one output y. The circuit makes y equal to 1 whenever the above sequence is detected, otherwise, y equals 0. 2- Implement the designed circuit using Logisim and test it for each of the following cases: a. 01101001101011010 b. 00110110110101101