Suppose a machine has two caches, an L$1$ cache and an L$2$ cache. Assume the following characteristics of cache performance:

$-$ The processor is able to execute an instruction every cycle, assuming there is no delay fetching the instruction or fetching the data used by the instruction.

$-$ An L$1$ cache hit provides the requested instruction or data immediately to the processor $($i$.$e$.$ there is no delay$).$

$-$ An L$2$ cache hit incurs a penalty $($delay$)$ of $20$ cycles.