Question: Suppose a system with byte-addressable memory uses a 32-bit virtual address and a 24-bit physical address. The pages are 4 KiB in length. Consider a

Suppose a system with byte-addressable memory uses a 32-bit virtual address and a 24-bit physical address. The pages are 4 KiB in length.

Consider a single-level paging approach. i. Draw a diagram showing the page number/offset division of bits in the virtual address. ii. What is the maximum number of entries that can be in a page table?

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