Suppose that a memory size is $16$ bytes and is divided into $8$ frames $($starting from frame $0$ to frame $7),$ each of size $2$ bytes. A process of size $4$ bytes is accommodated to frames $7$th and $8$th position in the main memory as shown in the figure below.

A CPU wants to execute $1$ and $3$ numbers of pages $0$ and $1.$ Explain how CPU will translate logical address to physical address to execute these bytes? Explain your answer with a diagram and write down the physical address of the memory for these numbers. $[3$ Marks$].$