Question: table [ [ C 3 . , , ] , [ , St , S 2 , S 3 , S 4 , 5

\table[[C3.,,],[,St,S2,S3,S4,55,,,],[11,2,1,1,1,2,,,],[12,1,3,2,2,2,,,],[13,2,1,1,3,1,,,],[14,1,2,2,2,2,,,],[15,3,1,2,2,2,,,]]
Consider a 5 stage pipeline processor to perform the following operations. The number of cyyles needed by the five instruction in the different stages of S1, S2, S3, S4, S5 is shown in the table.
a) Sketch the clock gycle diagram (5)
b) identify the noeded number of cycles to execute the ingurtctions (2)
c) Calculate the actual cycle time in the above pipelined design (3)
 \table[[C3.,,],[,St,S2,S3,S4,55,,,],[11,2,1,1,1,2,,,],[12,1,3,2,2,2,,,],[13,2,1,1,3,1,,,],[14,1,2,2,2,2,,,],[15,3,1,2,2,2,,,]] Consider a 5 stage pipeline processor to perform the following

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