TF$1,$ TR$1,$ TF$0,$ TR$0$ bits are of which register?

TMOD

SCON

TCON

SMOD

Clear selection

The contents of a base register are added to the contents of index register in

indexed addressing mode

based indexed addressing mode

relative based indexed addressing mode

based indexed and relative based indexed addressing mode

Clear selection

The instruction that pushes the contents of the specified register$/$memory location on to the stack is

PUSHF

POPF

PUSH

POP

Clear selection

The Carry flag is undefined after performing the operation

AAA

ADC

AAM

AAD

Clear selection

Which value of disc capacitors is preferred or recommended especially when the quartz crystal is connected externally in an oscillator circuit of $8051?$

$10$ pF

$20$ pF

$30$ pF

$40$ pF

Clear selection

The contents of the accumulator after this operation MOV A$,$ #$0$BH$$

ANL A$,$ #$2$CH will be

$11010111$

$11011010$

$00001000$

$00101000$

Clear selection

Which of the following commands will copy the contents of RAM whose address is in register $0$ to port $1?$

MOV @ P$1,$ R$0$

MOV @ R$0,$ P$1$

MOV P$1,$ @ R$0$

MOV P$1,$ R$0$

Clear selection

The NMI pin should remain high for atleast

$4$ clock cycles

$3$ clock cycles

$1$ clock cycle

$2$ clock cycles

Clear selection

The INTR signal can be masked by resetting the

TRAP flag

INTERRUPT flag

MASK flag

DIRECTION flag

Clear selection

The instruction that performs logical AND operation and the result of the operation is not available is

AAA

AND

TEST

XOR

Clear selection

Which of the following commands will copy the contents of location $4$H to the accumulator?

MOV A$,04$H

MOV A$,$ L$4$

MOV L$4,$ A

MOV $04$H$,$ A

Clear selection

For the INTR signal, to be responded to in the next instruction cycle, it must go$\_\_\_\_\_\_\_$in the last clock cycle of the current instruction

high

low

high or low

unchanged

Clear selection

The upper $128$ bytes of an internal data memory from $80$H through FFH usually represent

general$-$purpose registers

special function registers

stack pointers

program counters

Clear selection

Which among the below stated registers does not belong to the category of special function registers?

TCON & TMOD

TH$0$ & TL$0$

P$0$ & P$1$

SP & PC

Clear selection

What does the symbol $$#$$ represent in the instruction MOV A$,$ #$55$H$?$

Direct datatype

Indirect datatype

Immediate datatype

Indexed datatype

Clear selection

The instruction that loads effective address formed by destination operand into the specified source register is

LEA

LDS

LES

LAHF

Clear selection

Which of the ports act as the $16-$bit address lines for transferring data through it$?$

PORT $0$ and PORT $1$

PORT $1$ and PORT $2$

PORT $0$ and PORT $2$

PORT $1$ and PORT $3$

Clear selection

The instruction that loads the AH register with the lower byte of the flag register is

SAHF

AH

LAHF

PUSHF

Clear selection

If Timer $0$ is to be used as a counter, then at what particular pin clock pulse need to be applied?

P$3\mathrm{.}3$

P$3\mathrm{.}4$

P$3\mathrm{.}5$

P$3\mathrm{.}6$

Clear selection

Which instruction is used to check the status of a single bit?

MOV A$,$P$0$

ADD A$,$#$05$H

JNB PO$\mathrm{.}0,$ label

CLR P$0\mathrm{.}05$H

Clear selection

Which of the following commands will move the number $27$H into the accumulator?

MOV A$,$ P$27$

MOV A$,$ #$27$H

MOV A$,27$H

MOV A$,$ @$27$

Clear selection

In the RCL instruction, the contents of the destination operand undergo function as

carry flag is pushed into LSB & MSB is pushed into the carry flag

carry flag is pushed into MSB & LSB is pushed into the carry flag

auxiliary flag is pushed into LSB & MSB is pushed into the carry flag

parity flag is pushed into MSB & LSB is pushed into the carry flag

Which among the single operand instructions complement the accumulator without affecting any of the flags?

CLR

SETB

CPL

All of the above

Clear selection

In PUSH instruction, after each execution of the instruction, the stack pointer is

incremented by $1$

decremented by $1$

incremented by $2$

decremented by $2$

Clear selection

In the instruction $$MOV TH$1,$ #$-3,$ what is the value that is being loaded in the TH$1$ register?

$0$xFCH

$0$xFBH

$0$xFDH

$0$xFEH

Clear selection

Which memory allow the execution of instructions till the address limit of $0$FFFH especially when the External Access $($EA$)$ pin is held high?

Internal Program Memory

External Program Memory

Both a & b

None of the above

Clear selection

Which of the following instruction is not valid?

MOV AX$,$ BX

MOV DS$,5000$H

MOV AX$,5000$H

PUSH AX

Clear selection

Which of the following comes under the indexed addressing mode?

MOVX A$,$ @DPTR

MOVC @A$+$DPTR$,$A

MOV A$,$R$0$

MOV @R$0,$A

Clear selection

The mnemonic that is placed before the arithmetic operation is performed is

AAA

AAS

AAM

AAD

Clear selection

Which of the following statements will add the accumulator and register R$3?$

ADD @R$3,$ @A

ADD @A$,$ R$3$

ADD R$3,$ A

ADD A$,$ R$3$