The basic component of an arithmetic circuit is a parallel adder, which constructed with a number of full-adder circuits connected in cascade, as shown in the figure below (see left). By controlling the data inputs to the parallel adder, it is possible to obtain different type of arithmetic operations. The figure below demonstrates a configuration in which one set of inputs to the parallel adder is controlled by the select lines S_1 and S_0. The table below (see right) shows the arithmetic operations that are obtainable by controlling the value of Y with the two selection inputs S_1 and S_0. A) Complete the following truth table. Note that this truth table is only for one typical stage i of the logic. B) Derive an optimized the equation for Y_i using the empty K-map below