The MIPS processor can be set to operate in either big$-$endian or little$-$endian mode. Consider the Load Byte Unsigned $($LBU$)$ instruction, which loads a byte from memory into the low$-$order $8$ bits of a register and fills the high$-$order $24$ bits of the register with zeros. The description of LBU is given in the MIPS reference manual using a register$-$transfer language as