(The solutions are bolded) can you explain how to get these answers. i will like

2) A mov assembly instruction copies the value of the source register to the destination register. What is the value of the destination register r1 (32-bit) after the following instruction completes? What is the memory address of the next instruction? Memory Address Assembly Instruction Ox08000166 MOV r1, pc What is the value of the destination register r1 (32-bit) after the following instruction completes? r1 = pc = 0x08000166 r1=pc+4 = 0x0800016A (might be also correct, since some processors increase pc whenever it starts executing the current instruction, we should check in the lab) What is the memory address of the next instruction? address of the next instruction stored in pc: pc = Ox08000166 + 4 = 0x0800016A 3) Suppose a pipeline processor has three stages, as shown in Figure 1.14 (similar to the picture on slide#25). Assume in a perfect scenario (such as no branch instructions, no data dependence between instructions and no memory I/O waiting) a) How many clock cycles does it take to execute 10 instructions? 3 +9 = 12 cycles, (the first instruction takes 3 cycles, others will be available in every cycle) b) How many clock cycles does it take to execute n instructions? If n is sufficiently large, how many instructions per cycle can be executed (called throughput)? n+ 2 cycles, thoughput = n/(n+2) instruction per cycle, if n is sufficiently large, throughput is 1 instruction per cycle