These are picture $($A$)$ one$-$to$-$many n bit$($n$=8)$LSFR Code. Please write picture $($B$)$ many$-$to$-$one n bit$($n$=8)$ LSFR verilog Code and test bench code. Please refer to the one$-$to$-$many code and make it as similar as possible!!

$$ picture $($A$)$ Verilog Code is this one.$>$

$01$: $`$define TAP$22\text{'}$b$11$

$02$: $`$define TAP$33\text{'}$b$101$

$03$: $`$define TAP$44\text{'}$b$1001$

$04$: $`$define TAP$55\text{'}$b$10010$

$05$: $`$define TAP$66\text{'}$b$100001$

$06$: $`$define TAP$77\text{'}$b$1000001$

$07$: $`$define TAP$88\text{'}$b$10001110$

$08$: $`$define TAP$99\text{'}$b$10000100\_0$

$09$: $`$define TAP$1010\text{'}$b$10000001\_00$

$10$: $`$define TAP$1111\text{'}$b$10000000\_010$

$11$: $`$define TAP$1212\text{'}$b$10000010\_1001$

$12$: $`$define TAP$1313\text{'}$b$10000000\_01101$

$13$: $`$define TAP$1414\text{'}$b$10000000\_010101$

$14$: $`$define TAP$1515\text{'}$b$10000000\_0000001$

$15$: $`$define TAP$1616\text{'}$b$10000000\_00010110$

$16$: $`$define TAP$1717\text{'}$b$10000000\_00000010\_0$

$17$: $`$define TAP$1818\text{'}$b$10000000\_00100000\_00$

$18$: $`$define TAP$1919\text{'}$b$10000000\_00000010\_011$

$19$: $`$define TAP$2020\text{'}$b$10000000\_00000000\_0100$

$20$: $`$define TAP$2121\text{'}$b$10000000\_00000000\_00010$

$21$: $`$define TAP$2222\text{'}$b$10000000\_00000000\_000001$

$22$: $`$define TAP$2323\text{'}$b$10000000\_00000000\_0010000$

$23$: $`$define TAP$2424\text{'}$b$10000000\_00000000\_00001101$

$24$: $`$define TAP$2525\text{'}$b$10000000\_00000000\_00000010\_0$

$25$: $`$define TAP$2626\text{'}$b$10000000\_00000000\_00001000\_11$

$26$: $`$define TAP$2727\text{'}$b$10000000\_00000000\_00000010\_011$

$27$: $`$define TAP$2828\text{'}$b$10000000\_00000000\_00000000\_0100$

$28$: $`$define TAP$2929\text{'}$b$10000000\_00000000\_00000000\_00010$

$29$: $`$define TAP$3030\text{'}$b$10000000\_00000000\_00000000\_101001$

$30$: $`$define TAP$3131\text{'}$b$10000000\_00000000\_00000000\_0000100$

$31$: $`$define TAP$3232\text{'}$b$10000000\_00000000\_00000000\_01100010$

$32$:

$33$: $`$define TAPS $`$TAP$8$

$35$: module LFSR$\_$nbit$($Clock$,$ Reset, Y$)$;

$36$: parameter Width $=8$;

$38$: input Clock, Reset;

$39$: output $[$Width $-1$:$0]$ Y;

$41$: wire $[$Width $-1$:$0]$ Taps;

$43$: integer N;

$45$: reg Bits$0\_$Nminus$1\_$Zero, Feedback;

$46$: reg $[$Width $-1$:$0]$ LFSR$\_$Reg, Next$\_$LFSR$\_$Reg;

$48$: assign Taps$[$Width $-1$:$0]=`$TAPS;

$50$: always@$($negedge Reset or posedge Clock$)$

$51$: begin : LFSR$\_$Register

$52$: if$(!$Reset$)$

$53$: LFSR$\_$Reg $=0$;

$54$: else

$55$: LFSR$\_$Reg $=$ Next$\_$LFSR$\_$Reg;

$56$: end

$57$:

$58$: always@$($LFSR$\_$Reg$)$

$60$: begin : LFSR$\_$Feedback

$61$:

$62$: Bits$0\_$Nminus$1\_$Zero $=$ ~$|$ LFSR$\_$Reg$[$Width $-2$:$0]$;

$63$: Feedback $=$ LFSR$\_$Reg$[$Width$-1]^$ Bits$0\_$Nminus$1\_$Zero;

$64$:

$65$: for$($N$=$Width$-1$;N$>=1$;N$=$N$-1)$

$66$: if$($Taps$[$N$-1]==1)$

$67$:

$68$: Next$\_$LFSR$\_$Reg$[$N$]=$ LFSR$\_$Reg$[$N$-1]^$ Feedback;

$70$: else

$71$: Next$\_$LFSR$\_$Reg$[$N$]=$ LFSR$\_$Reg$[$N$-1]$;

$72$: Next$\_$LFSR$\_$Reg$[0]=$ Feedback;

$74$: end

$75$:

$76$: assign Y $=$ LFSR$\_$Reg;

$78$: endmodule

And

$01$: $`$timescale $1$ns$/1$ns

$02$: module tb$\_$LFSR$\_$nbit;

$03$: reg Clock;

$04$: reg Reset;

$05$: wire $[7$:$0]$ Y;

$06$: LFSR$\_$nbit LFSR$\_$nbit$\_1(.$Clock$($Clock$),.$Reset$($Reset$),.$Y$($Y$))$;

$07$: always #$100$ Clock$=$~Clock;

$08$: initial begin

$09$: Reset$=0$; Clock$=1$;

$10$: #$50$ Reset$=1$;

$11$: #$2000$ Reset$=0$;

$12$: end

$13$: endmodule$($A$)$ One $-$ to $-$ many

$($B$)$ Many $-$ to $-$ One