This is a Computer Organisation &

Microprocessor subject:

Please Draw:

draw a data path architecture diagram

with the same dpa drawing as above, focus on program counter part with $7$ signals to show how fetching process is happened. $($how PC moves with contents to memory address register and match the $7$ segments, label where are $S1-S7)$

Draw an instruction cycle state diagram for these instructions:

i$)$ mov R$2,$ #$300$ and ii$)$ mov @ $600,$ R$2$

Please draw clearly using pen and paper$/$ on ipad for better visibility.

U may refer William Stalling's Textbook but appreciate if you can simplify it a but as the textbook one seems complicated.

Please dont mark this question as lack of information as i dont know how to edit back.