This is a question from a High Performance Computing class:

[30p] Suppose you are given a picture as a 2D array of 400 by 900 pixels (i.e., each item of the 2D array represents a pixel) and a function Foo that applies some operation to each pixel. The size of a pixel in this scenario is 16 bits. You want to parallelize this function using CUDA. Design a kernel where each thread processes

one pixel. If thread Blocks should be square and you want to use the maximum number of threads per block on the device, how would you choose the execution configuration dimensions for optimal performance? You don't have to write Foos code, just give the configuration and explain your reasoning. Mention any relevant assumptions and/or considerations. (Assume compute capability 3.7).