This problem tests your knowledge of cache miss rates. To receive full credit, show your work used to derive the requested miss rate.

Assumptions:

$$ All code is run on an x$86-64$ machine with a $256-$byte, direct$-$mapped, write$-$allocate data cache with $8-$byte blocks.

$$ The cache is initially empty.

$$ Types will be aligned to addresses that are a multiple of their size.

$$ sizeof$($int$)=4.$

$$ array begins at memory address $0$x$0000000000000000.$

$$ The only memory accesses are entries of the array. The variables i and j

are kept in registers.

$$ The following problems are independent of each other.