This week we will implement a Moore machine based sequence detector. This design will include the detector state machine itself, which will read input one bit at a time on input w and output a '1' on output z when the sequence is detected, as well as several supporting modules. The supporting modules are a 16 bit shift register that holds the input sequence (read from the switches on our Basys3 board) and feeds it one bit at a time into the state machine, a counter that keeps track of the number of detections, and a top module that ties the three components together. The detection count will be shown as a binary number of 4 of the Basys3 board's LEDs. The block diagram for the design is shown in the figure below. Your state machine should detect overlapping sequences (if they can occur). Some helpful notes on each necessary piece of code, including an example state machine and test bench, are provided in the Lab module. Prelab 1. Draw the state diagram for a Moore machine based 011 detector. 2. Draw the state diagram for a Moore machine based 11001 detector. 3. Sketch out the Verilog code for each of these detectors (011, and 11001). 4. Sketch out the Verilog code for a 16 bit shift register with parallel load. 5. Sketch out Verilog code for a 4-bit counter with a count enable input. Activate Windows Go to Settings to activate Winc