TINFO 320 Hardware and Software Exam 2 Review, Winter 2018

Chapter 6

1) A STORE command will leave the original data in the calculator

a) deleted.

b) corrupted.

c) unchanged.

d) overwritten.

Mailbox Contents

2) What is the value in the calculator after the first instruction (505) is completed?

a) 1

b) 2

c) 3

d) 6

3) What is the value in the program counter (instruction location counter) after the first instruction (505) is completed?

a) 01

b) 02

c) 03

d) 04

4) The BRANCH ON ZERO instruction "jumps" if the value in the

a) mailbox is zero.

b) in basket is zero.

c) calculator is zero.

a) instruction location counter is zero.

5) In the von Neumann architecture, memory holds

a) data only.

b) instructions only.

c) data and instructions.

d) neither data and instructions.

Chapter 7

6) The register that will hold the data value that is being transferred between the CPU and a particular memory location is called the

a) PC.

b) ALU.

c) MAR.

d) MDR

7) Virtually every bus internal to the CPU is

a) serial.

b) cables.

c) optical.

d) parallel.

8) Increasing the number of bits available for the op code in an instruction word

a) increases the demand on the CPU.

b) increases the number of memory locations that can be addressed.

c) increases the number of instructions available in the instruction set.

d) has no impact on any of the above.

9) Classify the registers as either a) holding addresses only, b) holding instructions only, or c) anything.

IR ____

PC ____

MAR ____

MDR ____

Accumulator ____

General Purpose ____

10) What are Arithmetic Shifts commonly used for?

Chapter 8

11) The __________ must be designed to assure that each step of the instruction cycle has time to complete before the results are required by the next step.

a) ALU

b) clock cycle

c) Control Unit

d) instruction pointer

12) What does "locality of reference" mean?

a) most memory references occur concurrently

b) most memory references will pull data of numeric type

c) most memory references will be accessed in a predictable order

d) most memory references are confined to one or a few small regions of memory

13) Which of the following is most likely:

a) L1 cache has 32KB and L2 cache has 1MB

b) L1 cache has 1MB and L2 cache has 32KB

c) L1 cache has 32KB and L2 cache has 32KB

d) L1 cache has 1MB and L2 cache has 1MB

14) Which of the following is not an advantage of adding more than one CPU processor within a single integrated chip?

a) Relatively inexpensive.

b) Reduce resource conflicts.

c) Programs can be divided into independent pieces and run separately.

d) Reduces power consumption, heat, and stress but gives equivalent processing power.

15) Which of the following is a commonly used approach for improving performance of memory?

a) Doubling the capacity of memory.

b) Using DRAM instead of SDRAM.

c) Compressing instructions and data in RAM.

d) Widening the system bus between memory and the CPU.

Chapter 9

16) The method used to communicate events that need special attention to the CPU are known as

a) interrupts.

b) I/O controllers.

c) programmed I/O.

d) device controllers.

17) Since many interrupts exist to support I/O devices, most of the interrupt handling programs are also known as

a) device drivers.

b) device handlers.

c) peripheral handlers.

d) peripheral controllers

18) Which of the following is not a common function of an I/O disk controller?

a) The I/O disk controller manages main memory during the transfer.

b) The I/O disk controller recognizes messages addressed to it and accepts commands from the CPU.

c) The I/O disk controller has interrupt capability, which it uses to notify the CPU when the transfer is complete.

d) The I/O disk controller provides a buffer where the data from memory can be held until it can be transferred to the disk.

Chapter 10

19) What system performance attribute is most increased by using a redundant array of independent disks (RAID)?

a) System reliability

b) System accessibility

c) System serviceability

d) System maintainability

20) It is impossible to overemphasize the fact that, from the perspective of a computer, a network is

a) simply another I/O device.

b) just another hardware component.

c) the only device without a controller.

d) handled differently than all other I/O devices.

21) With the exception of the Cell Engine, current GPUs are generally based on maximizing the number of operations that can take place at the same time, or ______________.

a) serialization

b) concurrency

c) parallelization

d) synchronization

Chapter 11

22) USB uses a _________________ connection system, in which hubs are used to provide multiple connection points for I/O devices.

a) sequential

b) master-slave

c) peer-to-peer

d) hierarchical

23) The primary purpose of channel programs is to transfer data using DMA between

a) memory and CPU.

b) memory and the NIC.

c) memory and RAID arrays.

d) an I/O device and memory

24) Clustering is a fundamental technology in the design of high performance computing systems. Which of the following is not a benefit to clustering?

a) scalability

b) lower cost

c) increased availability

d) programming is easier

Chapter 12

25) In a __________ topology each computer node gets every message, but processes only those addressed to that node. There is no central hub in this topology.

a) star

b) bus

c) ring

d) mesh

26) How might a LAN be designed in a business setting to minimize extraneous traffic where possible?

a) Create separate LANs for each floor.

b) Create separate LANs for each manager.

c) Create separate LANs for each department.

d) Create separate LANs for each district or territory.

27) How do routers and gateways differ?

a) Routers are used in ISPs; gateways are used in WANs.

b) There are no differences between routers and gateways.

c) Routers interconnect dissimilar networks together; gateways connect similar networks.

d) Routers connect similar networks together; gateways interconnect dissimilar networks.