tion 5 8 marksl A group from Intel reported the specs of their new dual threshold digital system. The digital system was implemented in a 1.2V 100nm process and has 200 million transistors s, of which 20 million are in logic gates and the remainder in memory arrays. The average logic transistor width is 122 and the average memory transistor width is 42. 0-50nm). The process has two threshold voltages. Subthreshold leakage for OFF devices is 20nA/um for low threshold devices and 0.02nA/um for high threshold devices. Memories use low leakage high threshold) devices everywhere. Logic uses high threshold devices in all but 20% of the paths that are most critical to performance. (a) If subthreshold leakage is the primary source of static power, estimate the static power consumption of Intel's digital system. b) How would the static power consumption change if only low threshold devices were available? (c) As mentioned above, the logic uses high threshold devices in all but 20% of the paths that are most critical for performance. How is the performance of that digital system compared to that of the digital system when its logic is implemented in ) all low-threshold devices (it) all high-threshold devices Give reasoning to you answers tion 5 8 marksl A group from Intel reported the specs of their new dual threshold digital system. The digital system was implemented in a 1.2V 100nm process and has 200 million transistors s, of which 20 million are in logic gates and the remainder in memory arrays. The average logic transistor width is 122 and the average memory transistor width is 42. 0-50nm). The process has two threshold voltages. Subthreshold leakage for OFF devices is 20nA/um for low threshold devices and 0.02nA/um for high threshold devices. Memories use low leakage high threshold) devices everywhere. Logic uses high threshold devices in all but 20% of the paths that are most critical to performance. (a) If subthreshold leakage is the primary source of static power, estimate the static power consumption of Intel's digital system. b) How would the static power consumption change if only low threshold devices were available? (c) As mentioned above, the logic uses high threshold devices in all but 20% of the paths that are most critical for performance. How is the performance of that digital system compared to that of the digital system when its logic is implemented in ) all low-threshold devices (it) all high-threshold devices Give reasoning to you answers