To provide proper rounding for floating-point addition, three extra bits are included in right shifts of fractions: guard, round, and sticky. The least-significant of these, the sticky bit, stays one whenever a 1 bit is shifted through it. In designing the logic for a sticky bit, let the following state transistion table define the actions for R (reset) and I (input) on a D flip-flop.

 

RIQ(t) | Q(t+1) -+-------- 00 0 T 0 00 1 1 1 01 0 1 1 01 1 1 1 ld d |0 Five rows are shown (using d = don't care in the last row). The last row expands to four rows when a complete enumeration is done. (a) Using a sum-of-products, give the input to the D flip-flop in terms of R, I, and Q(t). (b) Draw the state diagram for the sticky bit logic from the table above. There is no separate output signal.