Trap$-$and$-$emulate $($T&E$)$ enables VMs in RISC$-$V$/$ because the architecture automatically traps theexecution of supervisor RISC$-$V instructions in U$-$mode to the xv$6$ OS$.$ However, ourdiscussed approach can only emulate RISC$-$V instructions on a RISC$-$V host. Let's consider building a Trap$-$and$-$Emulate $($T&E$)$ approach to run x$86$ instructions on RISC V host by answering the following questions:The above approach would be faster than full software emulation.O TrueO False