Tree structured logic. a) Show how to cascade three of the following comparators (making use of the En inputs and two OR gates) to create a 12 bit comparator. Note that if the En (Enable) line is not asserted, the comparator outputs are all negated (i.e.: 0). Make sure you label your inputs using X11 -- Xo and y11 -- Yo, where Xo and yo are the Isb's. 1 . 1 X3 X2 X1 Xo En x>y Xay b) Show how to connect three of the above comparators (without using the En inputs) and no additional logic to create a 10 bit comparator. Hint: think about using a tree structured approach the way that carry look ahead adders can be tree structured as in parts c) and d) of problem C.4. Again, make sure you label your inputs using Xo -- Xo and y9 -- Yo, where xo and yo are the Isb's. As a check -- the resulting circuit should have less propagation delay than the one in part a. Tree structured logic. a) Show how to cascade three of the following comparators (making use of the En inputs and two OR gates) to create a 12 bit comparator. Note that if the En (Enable) line is not asserted, the comparator outputs are all negated (i.e.: 0). Make sure you label your inputs using X11 -- Xo and y11 -- Yo, where Xo and yo are the Isb's. 1 . 1 X3 X2 X1 Xo En x>y Xay b) Show how to connect three of the above comparators (without using the En inputs) and no additional logic to create a 10 bit comparator. Hint: think about using a tree structured approach the way that carry look ahead adders can be tree structured as in parts c) and d) of problem C.4. Again, make sure you label your inputs using Xo -- Xo and y9 -- Yo, where xo and yo are the Isb's. As a check -- the resulting circuit should have less propagation delay than the one in part a