tried to answer first as you can please

on 1 yet wered A JK flip flop is currently in Reset State. At the positive edge of the clock pulse, J and Kinput changes to J=0, K=0. At the next positive edge of the clock pulse J=K=1. What will be the state of the flipflop at this stage? out of lag tion O Toggle state with Q=1,Q=0 O Toggle state with Q=0Q=1 o Latch state with Q=1,Q=0 O Latch state with Q=0,Q'=1 tion 2 Choose the correct SPOS expression for the given below expression: et ered ed out of F(A,B,C)-(A+B)(A+B+C) tion O (A+B+0 O(A'B)(ABC) (A'BO(A'BC") (ABC) O (A+B+C)(A'+B+C)(A+B+C) SIPO stand for Parallel In Serial out Shift Register. out of an The shift capability of a register permits the movement of data in/out of the register. a is false and b is true O Both are false Both are true O a is true and bis false Type here to search