Using EDsim51 simulator only. Modify the program given below (refer to the attached image). Add a instruction that will display the result of the accumulator in the seven segment display. NOTE: If the accumulator's result is in hexadecimal, the seven segment display must exhibit its decimal equivalent. EXAMPLE: Acc = 0x1D ** The seven segment display (SSD) must exhibit the number 29.

RST Step Pause New Copy Paste PO . 7 Display-select Decoder CS |DAC WR System Clock (MHz) 12.0 10000 Update Freq. PO . 6 Keypad Column 2 Time: 2s 420ms 407us - Instructions: 242000 + po . 5 SBUF Keypad Column + PO . 4 Keypad Column 0 R/0 W/0 THO TLO R7 0x00 B OxOO PO _ 3 Keypad Row 3 0x00 0x00 0x00 0x00 R6 0x00 ACC OXID org 800ph PO _ 2 Keypad Row 2 RXD TXD R5 0x00 PSW Ox00 limp main PO _ 1 Keypad Row 1 1 1 TMOD OxOO R4 OXID IP OX00 org 4ph PO . 0 Keypad Row 0 P1 - 7 LED 71Seg. dp |DAC DB7 | LCD DB7 SCON 0x00 TCON 0x00 R3 0X1D IE OxOO 8040| main: mov R1, #1DH ; The fir P1 . 6 LED 61Seg. gIDAC DB6 | LCD DB6 R2 0x74 PCON Ox00 30421 mov R2, #74H ; The s + p1.5 LED 51Seg. EIDAC DBS | LCD DBS pins bits TH1 TL1 R1 0x1D DPH Ox00 03441 mov a, R1 P1 . 4 LED 41 Seg. |DAC DB4 | LCD DB4 OxFF OxFF P3 Ox00 0x00 RO Ox00 DPL Ox00 8045 1 mov b, R2 P1 . 3 LED 31 .. . dl . . DB31 . . DB3| . . RS P1 . 2 LED 21 . .. cl . . DB2 1 . . DB2 | LCD E OxFF OxFF P2 SP 0x07 PC 8051 80471 cjne a, b, next ; compare P1 . 1 LED 1|Seg. b|DAC DB1 | LCD DB1 OxFF OXFF P1 P1 .0 LED 0|Seg. a | DAC DBO | LCD DBO OxF841 OXFF OxFF PO i PSW 0 0 0 0 0 0 0 0 limp stop ; if two IM 804D | next: jnc loop P2 . 7 SW 71ADC DB7 ; if num Modify Code P2 . 6 SW 61ADC DB6 034FI mov a, R2 ; if num + p2 . 5 SW 51ADC DB5 Code Memory addr 0x0000 0x02 value 80501 mov b, R1 P2 . SW 41ADC DB4 0 1 2 3 4 5 6 7 8 9 A B C D E F P2 . 3 SW 31ADC DB3 00 02 00 40 00 00 00 00 00 00 00 00 00 00 00 00 00 8052 | loop: mov R3, b ; temper P2 . 2 SW 21ADC DB2 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0541 div ab P2 . 1 SW 1 1ADC DB1 20 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 8055 1 mov a, R3 P2 . 0 SW OJADC DBO 30 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 P3 . 7 80561 mov R7,b ; storing ADC RD| Comparator Output 40 79 10 7A 74 E9 8A FO B5 FO 03 02 00 5B 50 03 EA P3 . 6 ADC WR 0358 | 50 89 FO AB FO 84 EB AF FO BF 00 F7 FC 00 00 00 00 cjne R7, #0Oh, loop; the lo + P3. 5 Motor Sensor 60 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 805B | stop : mov R4, a ; Stores P3 . 4 Display-select Input 1 P3 . 3 70 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 AND Gate Output |Display-se. .+ 0 end P3 . 2 ADC INTR Copyright @2005-2021 James Rogers Remove All Breakpoints P3 .1 Motor Control Bit 1|Ext. UART Rx P3 . 0 Motor Control Bit 0|Ext. UART Tx DI LD 1 2 3 AND Gate Enabled U No Parity 8-bit UART @ 4800 Baud 4 5 6 Key Bounce Enabled 0.0 V RX Rx Reset 8 input 7 Standard MAX 7 6 5 4 3 2 1 0 0 # TX Tx Send i i 0.0 V output 11111111 MIN Scope ADC Motor Enabled DAC BF O AC OXOO IR OXOO DR 0x00