Question: Using the following vhdl entity declartion for a four bit comparator write two architecture bodies one using Boolean equations, and one component instantiation statements and
Using the following vhdl entity declartion for a four bit comparator write two architecture bodies one using Boolean equations, and one component instantiation statements and components similar to the xnor and and-gate components.
entity comparator_4bit is port( a : in STD_LOGIC_VECTOR(3 downto 0); b : in STD_LOGIC_VECTOR(3 downto 0); equal : out STD_LOGIC; greater : out STD_LOGIC; lower : out STD_LOGIC ); end comparator_4bit;
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