$.$ Using Tomasulo$$s algorithm, for each instruction in the following sequence determine when $($in which cycle, counting from the start$=1)$ it issues, begins execution, ends execution, and writes its result to the CDB$.$ Assume that the result of an instruction can be written in one cycle after end of its execution. The execution time of load and store instruction is $3$ cycles, addition & subtraction takes $3$ cycles, multiplication takes $10$ cycles and division takes $20$ cycles. The processor has multiply$/$divide units and add$/$subtract units. The multiply$/$divide unit has two reservation stations, and the add$/$subtract unit has three reservation stations. There is one load and one store reservation stations as well. Assume that at start all instructions are already in the instruction queue, but none has yet been issued to any reservation stations. The processor can issue only one instruction per cycle, and there is only one CDB for writing results. In case of tie for CDB$,$ the instruction issued earliest gets CDB first. $[10]$ LD F$8,4($R$1)$ LD F$2,8($R$1)$ ADD F$4,$ F$2,$ F$8$ LD F$6,12($R$1)$ MUL F$8,$ F$6,$F$4$ SUB F$12,$ F$4,$ F$6$ SD F$12,8($R$2)$ SUB F$10,$F$8,$F$4$