==> VA references: 0, 1, 2, 3, 4, 0, 1, 2, 3, 4

	A.	0
	B.	16.67%
	C.	33.33%
	D.	50%
	E.	66.67%
	F.	83.33%
	G.	100%

==> VA references: 0, 100, 200, 300, 400, 0, 100, 200, 400, 300

	A.	0
	B.	16.67%
	C.	33.33%
	D.	50%
	E.	66.67%
	F.	83.33%
	G.	100%

==> VA references: 400, 300, 200, 100, 0, 400, 300, 200, 100, 0

	A.	0
	B.	16.67%
	C.	33.33%
	D.	50%
	E.	66.67%
	F.	83.33%
	G.	100%

QUESTION 28 Assume the following setting for a system which uses paging with TLB for virtualizing memory: - Page size is 32 bytes. - TLB has 4 entries. - TLB replacement policy is LRU (least recently used). For Question 28 to Question 31. determine the TLB hit rate without counting the compulsory misses for virtual memory address reference traces (1.e., a set of virtual memory address references by a program) given. ==> VA references: 0, 1, 2, 3, 0, 1, 2, 3 A. 0 B. 25% C. 50% D. 75% E. 100% QUESTION 28 Assume the following setting for a system which uses paging with TLB for virtualizing memory: - Page size is 32 bytes. - TLB has 4 entries. - TLB replacement policy is LRU (least recently used). For Question 28 to Question 31. determine the TLB hit rate without counting the compulsory misses for virtual memory address reference traces (1.e., a set of virtual memory address references by a program) given. ==> VA references: 0, 1, 2, 3, 0, 1, 2, 3 A. 0 B. 25% C. 50% D. 75% E. 100%