verilog arithmetic and combinational logic:

The fizzbuzz program outputs the first 100 integers, any integer which is a multiple of 3 should print fizz, any integer which is a multiple of 5 should print buzz, any integer a multiple of 3 and 5 should print fizzbuzz, the remaining integers should print their value.

Adders/Subracters can also be used in a fizzbuzz circuit. The verilog files arith_fb.v and tb_arith_fb.v

The modules in arith_fb.v contain behavioural code, this code should be replaced as described in the comments.

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public class FizzBuzz{ public static void main(String[] args){ for(int i= 1; i <= 100; i++){ if(i % 15 == 0){ System.out.println("FizzBuzz"); }else if(i % 3 == 0){ System.out.println("Fizz"); }else if(i % 5 == 0){ System.out.println("Buzz"); }else{ System.out.println(i); } } } } 

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`timescale 1ns / 1ns // handles fizzbuzz 0 to 15 module fb15( fizz, buzz, num); output fizz, buzz, fizzbuzz; input [3:0] num; // replace with boolean logic assign fizz = (num%3) == 0; assign buzz = (num%5) == 0; endmodule module sub15( diff, v); output [5:0] diff; input [5:0] v; // replace with half and full adders assign diff = v - 15; endmodule module mux2_1( o, i1, i2, sel); output o; input i1, i2, sel; // replace with gates assign o = sel ? i1 : i2; endmodule // handles fizzbuzz 0 to 30 module fb30( fizz, buzz, num ); output fizz, buzz ; input [4:0] num; wire f1, b1, f2, b2; wire [5:0] diff; sub15 subtracter( diff, {1'b0, num} ); fb15 lower( f1, b1, num[3:0] ); fb15 upper( f2, b2, diff[3:0] ); mux2_1 m1( fizz, f1, f2, diff[5] ); mux2_1 m2( buzz, b1, b2, diff[5] ); endmodule // handles fizzbuzz 0 to 45 module fb45( fizz, buzz, num ); output fizz, buzz ; input [5:0] num; // replace with boolean logic // or other of the previous modules assign fizz = (num%3) == 0; assign buzz = (num%5) == 0; endmodule 

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`timescale 1ns / 1ns module main; wire fizz, buzz ; reg [5:0] num; integer fb30_passed, fb45_passed; wire test_fizz = (num % 3) == 0; wire test_buzz = (num % 5) == 0; fb30 test1( fizz30, buzz30, num[4:0]); fb45 test2( fizz45, buzz45, num); initial begin num = 0; fb30_passed = 1; repeat ( 31 ) begin #10; //$display("fb30: num=%d fizz=%b buzz=%b", num, fizz30, buzz30); if ( fizz30 != test_fizz || buzz30 != test_buzz ) begin $display("fb30 failed at %d", num); fb30_passed = 0; end num = num + 1; end if ( fb30_passed == 1 ) begin $display("fb30 passed"); end num = 0; fb45_passed = 1; repeat ( 46 ) begin #10; //$display("fb45: num=%d fizz=%b buzz=%b", num, fizz45, buzz45); if ( fizz45 != test_fizz || buzz45 != test_buzz ) begin $display("fb45 failed at %d", num); fb45_passed = 0; end num = num + 1; end if ( fb45_passed == 1 ) begin $display("fb45 passed"); end end endmodule 

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The modules in arith_fb.v contain behavioural code, this code should be replaced as described in the comments.