Question: Virtualization Suppose a machine has 4-level page tables with nested page tables (on Intel known as EPT). Suppose a program accesses memory and the address

Virtualization Suppose a machine has 4-level page tables with nested page

Virtualization Suppose a machine has 4-level page tables with nested page tables (on Intel known as EPT). Suppose a program accesses memory and the address is not in the TLB. In the worst case, how many memory accesses are needed? 10 5 more than 20 9

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