We examined how an instruction is executed in a single-cycle data path. Problems in this question refer to a clock cycle in which the processor (single cycle processor) fetches the following instruction word 10101100011000100000000000010100. Assume that data memory is all zeros and that the processor's registers have the following values at the beginning of the cycle in which the above instruction word is fetched r31 16 r1 r2 r4 r8 r5 10 r12 0 a. What are the outputs of the sign-extend and the jump "shift left 2" unit (near the top of Figure 4.24 from the book) for this instruction word? d. For the ALU and the two add units, what are their data input values