We know that $$is actually X $*$Y$+$X$*$Y $.$ Given F below, answer the questions that follow. Remember that $$ has the lowest operator precedence.

F$=$A $$ B$+($C$*$A$)$

Draw the circuit for F using an XOR gate for the $$ operation.

Rewrite the expression, replacing the $$ with the equivalent expression using ANDs$/$ORs$/$NOTs$.$ Do not simplify this expression in any way.

Draw circuit for the revised expression in part b$.$

Count the total number of gates from part a and compare them to the total number of gates from part c$.$

Instead of using a negator and adder to perform subtraction, we can build a subtractor circuit using the same type of logic that we used to build the adder. The subtractor circuit computes the difference and borrow out. For an n$-$bit subtractor, the leftmost subtraction can use a half subtractor while the rest of the subtractions will use a full subtractor. The half subtractor has two inputs $($the bit from X and from Y$)$ and two outputs, the difference and a borrow out. The full subtractor has three inputs $($a borrow in$)$ and the two outputs. See the truth tables below.

Xi Yi Bi Diffi Bi$+1$

$00000$

$00111$

$01011$

$01101$

$10010$

$10100$

$11000$

$11111$

Xi Yi Diffi Bi$+1$

$0000$

$0111$

$1010$

$1100$

Explain the logic of the two truth tables $($that is$,$ explain why the outputs are as shown$).$

The circuit below is the implementation of a full subtractor. Like the full adder, it consists of two half subtractors plus an OR gate. Explain how it works.

Explain the changes you would make to adapt the unsigned multiplication circuit $($slide $19$ from the chapter $3$ power point notes$)$ into an unsigned division circuit.

A jukebox is controlled by a circuit to determine if it should play a selected song. The circuit outputs a $1$ under the following conditions, all of which must be true.

The jukebox is in active operating mode.

A legitimate song must have been selected. Songs are numbered $10-31$ but the input is a number from $10-99,$ so numbers $32-99$ are not legal.

The user must have inserted payment.

The record containing the song and the turntable must be free of obstruction.

The circuit receives input as follow, outputting a $1$ if the above conditions are true.

Operating mode is denoted by variables m$1$m$0$ and is $00($off mode$),01($maintenance mode$),10($active mode$).11$ is not used.

The song selection is converted from a $2-$digit input into $7-$bit binary number denoted by variables i$6$i$5$i$4$i$3$i$2$i$1$i$0$ where $0-31$ is a legal number.

Payment is one of credit card, coins or tokens. These are indicated through three variables: CC$,$ CS$,$ TS$.$ If any of these are $1,$ the payment condition is fulfilled.

Four sensors detect obstructions: R $($record rack$),$ A $($moving arm$),$ T $($turntable$)$ and N $($turntable needle$).$ The condition requires that there are no obstructions.

Derive the Boolean expression for the circuit. Remember that the Boolean expression consists of Boolean variables $($m$1,$ m$0,$ i$6,...,$ i$0,$ CC$,$ CS$,$ TS$,$ R$,$ A$,$ T$,$ N$)$ and Boolean operators $($AND$,$ OR$,$ NOT, XOR$),$ not notation like $=1$ or Provide the simplified version of the derived expression.

Draw the circuit from part a$.$

Answer the following questions about the MUX.

Part of the MUX is a decoder so that each AND gate operates as a $$number recognizer$.$ What is a number recognizer and how does the AND gate recognize a number.

Why does a MUX have an OR gate? Why does it have only a single OR gate?

Explain in detail, but do not draw, a MUX that has $3$ selector bits and $8$ inputs. You can refer to these as s$2$s$1$s$0$ and i$7,$i$6,$i$5,$i$4,$i$3,$i$2,$i$1,$i$0$ if needed.

Draw the following circuits using S$-$R flip$-$flops. You do not need to draw either enable gates or the internal parts of the flip$-$flops $($just the S$,$ R$,$ Q$,$ ~Q labels in the flip$-$flops$).$

$5-$bit left rotate

$5-$bit arithmetic right shift

We want to expand the $2-$bit ALU from the textbook $($and slide $27$ of the chapter $3$ power point notes$)$ to be a $16-$bit ALU but still with the same four functions. Answer the following.

How many columns of circuitry will the ALU have; of these, how many will contain a full adder and how many will contain a half adder?

How many total OR gates will the ALU have?

How many selector bits will the decoder portion of the ALU have?