Week 07 Slide 28 shows a circuit for a 16-register register file.  If the size of each register is doubled how many additional logic gates will be needed to re-implement this register unit, excluding the additional logic gates needed to double the size of each register?

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Register unit (Register file) circuit Write Result Result Register Name Enable Operand 1 Register Name Operand 2 Register Name Clock Data Bus АЗ A2 A1 A0 ENABLE АЗ A2 A1 A0 АЗ A2 A1 AO 4-to-16 DECODER with ENABLE 4-to-16 DECODER 4-to-16 DECODER Y15 Y01 YO0 Y15 Y01 YO0 Y15 Y01 ... YO0 DATA IN LOAD REGISTER 0 CLOCK DATA OUT BUF BUF DATA IN LOAD REGISTER 1 CLOCK DATA OUT BUF BUF DATA IN LOAD REGISTER 15 CLOCK DATA OUT BUF BUF Operand 1 Bus Operand 2 Bus ...I Register unit (Register file) circuit Write Result Result Register Name Enable Operand 1 Register Name Operand 2 Register Name Clock Data Bus АЗ A2 A1 A0 ENABLE АЗ A2 A1 A0 АЗ A2 A1 AO 4-to-16 DECODER with ENABLE 4-to-16 DECODER 4-to-16 DECODER Y15 Y01 YO0 Y15 Y01 YO0 Y15 Y01 ... YO0 DATA IN LOAD REGISTER 0 CLOCK DATA OUT BUF BUF DATA IN LOAD REGISTER 1 CLOCK DATA OUT BUF BUF DATA IN LOAD REGISTER 15 CLOCK DATA OUT BUF BUF Operand 1 Bus Operand 2 Bus ...I

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To implement one buffer we need Four Logic gates For every one ... View the full answer