2. What are the differences between EPROM, EEPROM, and flash memory?
3. What is Hamming Error-Correcting Code? How does SDRAM differ from ordinary DRAM?
4. Design a 16-bit memory of total capacity of 8192 bits using SRAM chips of size 64 * 1 bit. Give the array configuration of the chips on the memory board showing all required input and output signals for assigning this memory to the lowest address space. The design should allow for both byte and 16-bit word accesses.
5. The memory of a particular microcomputer is built from 64K * 1 DRAMs. According to the datasheet, the cell array of the DRAM is organized into 256 rows. Each row must be refreshed at least once every 4 ms. Suppose we refresh the memory on a strictly periodic basis.
   1. What is the time period between successive refresh requests?
   2. How long a refresh address counter do we need?