What causes a register to enter a metastable state? a. failure to satisfy a data setup time requirement b. exceeding the maximum recommended VCC voltage c. excessive fanout d. none of the above 15) Considerr a 2-bit binary counter. What is the count sequence if the output is taken from the Q-bar outputs instead of the Q outputs? a. 0, 1, 2, 3, 0, 1,... b. 0, 1, 2, 3, 4, 0,.... c. 3, 2, 1, 0, 3,.... d. none of the above 16) Which of the following are invalid inputs for a D-latch? a. D = '0' b. d = '1' c. A D-latch doesn't have any invalid inputs