When a system has multiple bus master capable devices, the device that is mostlikely to request the buses or the one that controls the buses when no other potentialmaster is requesting them is designated as the default bus master. Usually, the defaultbus master is given the task of booting the system upon a power$-$up or soft resetcondition. Therefore, bus arbitration transactions place requests to the default busmaster.When the potential master completes its task, it would disable its internal busdrivers, isolating itself from the bus and thenwould unassert theBRQline. Thiswouldbe the indication to the CPU that the buses are free. The CPU would then proceedby unasserting the BGT signal and enabling its bus drivers, becoming again the busmaster.