When designing logic using only NMOS pass transistors, we don't have certain requirements about the F output value. In this question, Your design should always have a value of either $0$ or $1$ for $,$ which means $$ should never go to high impedance mode. Please finish the following design.

a$)$ AND logic

b$)$ XOR logic

c$)$ F $=$ XY$\text{'}$Z

d$)$ F $=$ A$\text{'}$B$+$CD$\text{'}+$E