Question: Which definition of the data memory is consistent with the following definition of the MemtoReg mux: assign WD = (MemtoReg) ? DMemory[ALUOut>>1]: ALUOut; reg[31:0] DMemory[0:1023];

Which definition of the data memory is consistent with the following definition of the MemtoReg mux:

assign WD = (MemtoReg) ? DMemory[ALUOut>>1]: ALUOut;

reg[31:0] DMemory[0:1023];

reg[0:31] DMemory[0:1023];

reg[0:7] DMemory[0:1023];

reg[15:0] DMemory[0:1023];

reg[7:0] DMemory[0:1023];

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