with explanation please

Bonus: Recall that a toggle flip-flop, or T flip-flop, is a device where the Q output can either stay the same or toggle for each applied clock pulse. That is, it follows the truth table shown below, which was obtained in extra problem 1 from chapter 7. The circuit shown below is a sequential logic circuit that uses two T flip-flops. Write the state equations, develop a state table, combine any equivalent states, and sketch the STG for the circuit. Also, indicate if there are any reset-only or trap states. Hint: you should include Qnext columns in the state table just like we did with JK flip-flop circuits