Write HDL code for $88$ bit Baugh$-$woolly multiplier using structural modelling style. Use modular and regular instances.

A$.$ Draw the structure and identify the module requirement of the design from the algorithm.

B$.$ Show the functional simulation using test bench for all possibilities signed and unsigned numbers.

C$.$ Synthesis the code and show the post synthesis simulation results

D$.$ Implement the design and show the post route simulation results and report the hardware utilization, maximum frequency of operation.

E$.$ Report the power on the maximal frequency reported in Part $($D$)$