Write the VHDL for the binary to seven-segment-display system shown above. Your VHDL must have at least five separate processes, each having only one output.

Consider the system diagram below. Each rectangle represents a functional block and thus should be its own process. The 8-bit input is read in two processes. The first process finds the absolute value and the second puts a negative sign or a blank on the leftmost Hex display. The absolute value of in_num is separated into its three digits using division (/) and remainder (rem) functions. Each of the digits is input to a process that outputs the appropriate constant to display that digit on a seven segment display. minus HEX3(6.0) 1 blank Is negative? Convert to SSD constant Find absolute Abs num HEX2(6.0) value In num(7..0) undreds_dig Convert to SSD constant HEX1(6.0) Tens _dig Convert to SSD constan HEX0(6.0). Ones dig Consider the system diagram below. Each rectangle represents a functional block and thus should be its own process. The 8-bit input is read in two processes. The first process finds the absolute value and the second puts a negative sign or a blank on the leftmost Hex display. The absolute value of in_num is separated into its three digits using division (/) and remainder (rem) functions. Each of the digits is input to a process that outputs the appropriate constant to display that digit on a seven segment display. minus HEX3(6.0) 1 blank Is negative? Convert to SSD constant Find absolute Abs num HEX2(6.0) value In num(7..0) undreds_dig Convert to SSD constant HEX1(6.0) Tens _dig Convert to SSD constan HEX0(6.0). Ones dig